Silicon integrated circuit chips (IC) are typically packaged in sealed enclosures, such as chip carriers or dual in-line packages (DIP), and interconnected with other components on printed circuit boards. The integrated circuit is typically connected to a carrier substrate with the active or upper surface of the integrated circuit facing away from the carrier substrate. Interconnection between the IC and the substrate is typically made by thin metal wires or wirebonds welded between the pads of the IC and the circuitry on the printed circuit board.
In an alternate packaging configuration known as flip-chip, the integrated circuit is bonded directly to the substrate by means of solder bumps or other metal interconnects and is mounted with the active surface facing the printed circuit board. This type of interconnection eliminates the expense, unreliability, and low productivity of manual or automated wirebonding. The flip-chip or control-collapse-chip-connection (C4) utilizes solder bumps deposited on wettable metal terminals of the chip and a matching footprint of solder wettable terminals on the substrate. The flip-chip is aligned to the substrate, and all interconnections are made by reflowing the solder. This is opposite to the traditional method of bonding where the active side of the chip is facing up and is wirebonded to the substrate.
When a semiconductor device with an erasable programmable read only memory (EPROM) is mounted in the conventional manner, that is, wirebonded, its storage information can be erased by irradiating the EPROM with light of a certain wavelength. This erasure is performed by means of a window capable of transmitting ultraviolet light. Ceramic packages including this window are typically used for packaging such devices but present the disadvantage of having considerable bulk.
In products where down-sizing circuitry is key to maintaining a competitive edge, a device that would eliminate the cumbersome, costly and unreliable wirebonds and ceramic package would be advantageous. However, if a device such as an EPROM chip were flipped onto a printed circuit board, the ability to erase the EPROM would become impractical because the window would be facing the substrate. A packaged IC having an optically erasable surface facing the substrate would also present the same problem as the flip-chip device. Every time erasure would be desired the device would need to be removed from the printed circuit board. Hence, a technique and means of achieving erasing capability between a chip having an optically erasable surface facing towards the printed circuit board substrate is needed.